1. Technical Field
Example embodiments relate generally to a semiconductor device. More particularly, embodiments of the present disclosure relate to a system on-chip that controls a random access memory (e.g., a dynamic random access memory (DRAM), etc) and an electronic device including the system on-chip.
2. Description of the Related Art
Generally, a random access memory device includes a random access memory and a memory controller that controls the random access memory. Here, the memory controller may be implemented with a central processing unit (CPU) of an electronic device as a system on-chip. In the random access memory device, an initializing operation (e.g., a function such as memset( ), etc.) that initializes a specific address range of the random access memory with an initialization value (e.g., a binary digit ‘0’ or a binary digit ‘1’) is frequently performed. Conventionally, the initializing operation is performed in a way that the central processing unit repetitively transmits, by a specific unit (e.g., by a byte unit, by a word unit, by a cache-line unit, etc), initialization data including initialization values to the random access memory device via buses and the memory controller repetitively writes the received initialization data into the random access memory in the random access memory device. That is, since the initializing operation makes the central processing unit repetitively transmit the initialization data having the same pattern to the random access memory device via the buses, the initializing operation may unnecessarily increase bus traffic and/or a load of the central processing unit. As a result, performance degradation of the electronic device may occur.